N-bit Multiplexers Using Verilog

Abstract

Multiplexer is a digital circuit with multiple inputs and one output. It is a Multi input single output circuit. Multiplexers uses the notation 2ⁿ X 1 or 2ⁿ : 1  or 2ⁿ to 1. n represents select lines.

The paper n-bit Multiplexers Using Verilog includes three Multiplexers 1-bit 8X1 Multiplexer, 8-bit 8X1 Multiplexer and 8-bit 16X1 Multiplexer. The three Multiplexers are designed, simulated and Synthesized Using Verilog. The Verilog Modules of each Multiplexer are developed and Synthesized to obtain RTL and Technology schematics. In the next step, The verilog Test benches are developed for each Multiplexer and simulated using Behavioral simulation to obtain the Output waveforms. Next The Output waveforms are verified as per the given Truth Tables.

The design summary of each Multiplexer can be obtained after synthesization and simulation. The design summary includes Timing Summary, Device Utilization Summary, Primitive and Black Box Usage and Timing Reports etc.

n-bit Multiplexers Using Verilog can be further implemented for various set of Test Benches. A Test Bench contains different set of input combinations. In future n-bit Multiplexers can be further implemented for increased value of n with multiple Test Bench combinations. n-bit Multiplexers can be designed Using VHDL as well as other HDL languages also and the design can be implemented using Field Programmable Gate Array(FPGA).